vlogan command line options
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-cpp <path to compiler>
For VCS/SystemC, specifies a g++ compiler other than the default of
CC of Solaris, g++ on Linux and aCC on HP-UX as determined by your
PATH variable. If you supply just a basename, the compiler is
assumed to be in your PATH. If you supply a complete path, that
compiler will be used. The supported compilers for VCS/SystemC
can be found in the Release Notes.
-f <filename>
Specifies a file containing Verilog source file names and command
line options.
-full64
Analyzes the design for 64-bit simulation.
-help
Displays brief descriptions of the valid command line options.
Displays this file.
-ID
Displays the hostid or dongle ID for your machine.
-kdb
Enables generating Verdi KDB database.
-l <logfile>
(lower case L) Specifies a log file for vlogan messages.
-location
Displays the location of the vlogan installation.
-notice
Enables verbose diagnostic messages.
-nc
Suppress copyright banner.
-override_root
Specifies source files containing data type declarations in $root.
The -override_root option in your command line replaces the
existing $root information with the $root information
generated by the current command. You must analyze all source
files containing data types in $root together on the same vlogan
command line.
-override_timescale=time_unit/time_precision
Overrides the time unit and a precision unit for all the `timescale
compiler directives in the source code and, like the -timescale option,
provides a timescale for all module definitions that don't contain
`timescale compiler directive.
Do not include spaces when specifying the arguments to this
option.
-platform
Returns the name of the platform directory in your VCS installation
directory.
-q
Suppresses compiler messages.
-sc_model <module name>
Specifies the Verilog module for which to generate a SystemC wrapper.
The wrapper allows to instantiate a Verilog module inside SystemC
using the VCS/SystemC interface.
-sc_include <include_file_name>
Specifies the SystemC header file with the enumeration typedefs used as port
types. This is required for the SystemC wrapper generation and can only be
used in combination with the option "-sc_model".
-sc_genif <module name>
Specifies the Verilog module for which to generate a SystemC wrapper.
The wrapper allows to instantiate a Verilog module inside SystemC
using the VCS/SystemC interface. To make use of this one of the two
options '-sysc=dpi_if' or '-sysc=opt_if' must be specified too.
-sc_portmap <port_mapping_file>
Specifies a port mapping file in combination with -sc_model.
-sverilog
Enables the analysis of SystemVerilog source code.
-sysc=gen_portmap
Print the list of ports of the interface model. This list serves
as a starting point to manually write a <port_mapping_file>.
-sysc=pli_if (default)
-sysc=opt_if
-sysc=dpi_if
-sysc=noopt_if
-sysc=nodpi_if
Specifies what kind of SystemC wrapper to build.
Use OPT (-sysc=opt_if) for highest speed or when the model contains
bidirectional (inout) ports. DPI is deprecated; it is generally faster
than PLI but slower than OPT. Default is PLI in most case and can always
be enforced with -sysc=noopt_if or -sysc=nodpi_if.
-sysc=q
Suppress all VCS messages below error level, .i.e warnings and notes.
Warnings from the C/C++ compiler and Make are not suppressed.
-power=lp_assert
To enable PAVE APIs (`lpa_*) in UUM flow.
-timescale=time_unit/time_precision
This option enables you to specify the timescale for the source
files that don't contain `timescale compiler directive and precede
the source files that do.
Do not include spaces when specifying the arguments to this
option.
-u
Changes all character
-v <filename>
Specifies a Verilog library file to search for module definitions.
-V
Enables the verbose mode.
-work <VHDL_logical_library>
Specifies creating the VERILOG directory and writing the intermediate
files in the physical directory associated with this logical library.
-y <directory_pathname>
Specifies a Verilog library directory to search for module
definitions.
+define+<macro_name>=<value>
Defines a text macro.
+incdir+<directory>
Specifies the directories that contain the files you specified with
the `include compiler directive. You can specify more that one
directory, separating each path name with the + character.
+libext+<extension>
Specifies that vlogan only search the source files in a Verilog
library directory with the specified extension. You can specify
more than one extension, separating each extension with the +
character.
For example, +libext++.v specifies searches library files with no
extension and library files with the .v extension.
Enter this option when you enter the -y option.
+librescan
Specifies always starting the search for unresolved module
definitions with the first library specified on the vcs command line.
+v2k
Enables the use of new Verilog constructs in the 1364-2001 standard.
+warn=[no]ID|none|all,...
Enables or disables warning messages.